The present invention disclosed herein relates to a delta-sigma modulator, and more particularly, to a delta-sigma modulator having a continuous-time structure.
A delta-sigma modulator may be implemented in a discrete-time scheme or a continuous-time scheme. A delta-sigma modulator according to the discrete-time scheme stores and delivers an input signal in a charge type on the basis of a switched-capacitor scheme. While the discrete-time delta-sigma modulator operates according to a sampling process for an input signal, the continuous-time delta-sigma modulator may operate without a sampling process for an input signal.
Compared to the discrete-time scheme, the continuous-time scheme has a low requirement for a design of an amplifier used for an integrator and may operate in low power and high speed. When the integrator does not perform a sampling operation, the continuous-time delta-sigma modulator has an anti-aliasing filter effect.
According to characteristics of a high signal to noise ratio (SNR), the continuous-time delta-sigma modulator may be used for a wireless communication system, such as a 3rd generation partnership project (3GPP), long term evolution (LTE), and worldwide interoperability for microwave access (WiMAX).
In addition, delta-sigma modulators having an identical sampling frequency may use a scheme for increasing an order and output level for enhancing the SNR characteristics. For example, when an order of the delta-sigma modulator is increased to a 1st, 2nd, and 3rd-order, slopes of a noise transfer function (NTF) of the delta-sigma modulator are respectively increased to 20 dB/dec, 40 dB/dec. 60 dB/dec. Accordingly, a noise amount within a signal band may be reduced and SNR characteristics may be increased.
However, when an order of the delta-sigma modulator for increasing an SNR is increased, the number of integrators is also necessary to be increased according to the increase of the order. However, power consumption is also increased along with the increase of the number of integrators, and the number of digital-to-analog converters (DACs) connected back to the integrators is also increased. Accordingly, a circuit of the delta-sigma modulator becomes complex.